1. Field of the Invention
The present invention relates to an image processing apparatus and control method thereof. For example, the present invention relates to an image processing technique associated with a printer or multi-function peripheral which prints vector data such as a page description language. Particularly, the present invention relates to an image processing technique associated with a printer or multi-function peripheral which converts an image in raster sequence into an image in tile sequence when spooling a raster image after rendering.
2. Description of the Related Art
A multi-function peripheral has been proposed as an image processing apparatus which renders vector data such as a page description language, spools a generated raster image or a raster image read from a scanner, and causes a printer engine to print. As disclosed in Japanese Patent Laid-Open Nos. 2002-300190 and 2002-305622, when spooling a raster image, the image is converted from the raster sequence into the tile sequence (this process will be called a raster-tile conversion process hereinafter). In this case, image processes can be executed in parallel, achieving high-speed printing.
FIGS. 16A and 16B are a block diagram showing the controller arrangement of a conventional image processing apparatus which performs the raster-tile conversion process (only building elements associated with this specification will be explained with reference to FIGS. 16A and 16B). FIGS. 16A and 16B show a controller unit 2000 of the image processing apparatus. The controller unit 2000 includes a system controller unit 2150 which is formed from a 1-chip ASIC surrounded by a broken line, generates output image data from externally received page description language data, and processes input image data. The controller unit 2000 also includes an image processing unit 2149 which is formed from a 1-chip ASIC surrounded by a broken line, receives and outputs output image data from the system controller unit 2150, and transmits input image data to the system controller unit 2150.
A CPU 2001 processes page description language data received via a network 2011, and converts it into a renderable display list. A rendering unit 2060 generates a raster image. The pixels of the generated raster image are sent as video signals 211 in the raster sequence to a tile generation unit 2061 via an image conversion unit 2135. The tile generation unit 2061 converts the pixels into the tile sequence.
The building elements in FIGS. 16A and 16B will be referred to in the description of FIGS. 17 and 18.
FIG. 17 is a data flowchart showing details of the rendering unit 2060 in the prior art. A display list store on the left side of FIG. 17 corresponds to a renderable display list converted from page description language data upon a process by the CPU 2001. The display list store is stored in, e.g., an external storage 2004 in FIG. 16A. A temporary store on the right side of FIG. 17 is an area for temporarily storing data during a process by the rendering unit 2060. The temporary store is reserved in, e.g., a RAM 2002 in FIG. 16A. The center in FIG. 17 corresponds to process function units executed by the rendering unit 2060, and is implemented by hardware, software, or a combination of them.
A command execution unit 300 fetches a command stream of the display list, and sequentially executes the commands. By using a border record store, a border processing unit 400 converts border information into information on X coordinates and a graphic object for each scan line. The pair of X coordinates of each graphic object serves as span information of the graphic object on the scan line. By using a priority order characteristic/status table, a priority order determination unit 500 determines a visible object from the priority order of the positional relationship between graphic objects, and generates a filling command including the span of the target scan line. By using a filling data table, a filled color determination unit 600 determines a color to fill pixel data of a raster image for each object of the target scan line. For a flat object, the filled color determination unit 600 generates the color and span of the flat object. For an object which is not flat, such as an image or gradation, the filled color determination unit 600 generates the color of each pixel. By using a pixel composition stack, a pixel composition unit 700 composites the colors of overlapping objects using generated colors. When compositing flat objects, the pixel composition unit 700 outputs the composited color and run-length information. When compositing objects which are not flat, the pixel composition unit 700 outputs pieces of color information. A pixel output unit 800 expands the run-length information generated by the pixel composition unit 700 into information of all pixels, and transmits the expanded information as the video signal 211.
FIG. 18 is a data process flowchart showing a process sequence from reception of a page description language to printing in the arrangement of the prior art in FIGS. 16A, 16B, and 17. In the following description, building elements with reference numerals in FIGS. 16A and 16B, and processing units in FIG. 17 will be referred to.
The CPU 2001 performs a vector data generation process 101 to generate display list-type vector data from a page description language. The command execution unit 300, border processing unit 400, and priority order determination unit 500 perform a span generation process 102 to convert the display list data into span information of each scan line. The filled color determination unit 600 and pixel composition unit 700 perform a color filling process 103. The pixel output unit 800 performs a pixel generation process 104. The span generation process 102, color filling process 103, and pixel generation process 104 are executed by the rendering unit 2060 in FIG. 16A.
The tile generation unit 2061 in FIG. 16A executes a raster-tile conversion process 105 for generated pixels. The raster-tile conversion process 105 requires an intermediate buffer memory 106 to store a raster image corresponding to the height of a tile. As the intermediate buffer memory 106, the tile generation unit 2061 in FIG. 16A uses a partial area of a main memory (RAM) 2002 accessed via a system bus bridge 2007 and RAM controller 2124. The tile generation unit 2061 also executes a tile image compression process 107. The compressed rater images in the tile sequence are spooled in the external storage 2004 of FIG. 16A by a spool process 108.
A tile expansion unit 2103 in FIG. 16B performs an expansion process 109 for the image having undergone the spool process 108 in the external storage 2004 of FIG. 16A. An image rotation unit 2030 and the like perform a rotation process 110 and the like for the expanded image via a tile bus 2107. Image output interfaces 2113, 2151, 2152, and 2153 perform tile-raster conversion for the expanded tile-type pixel data having undergone the rotation process and the like. Image processing units 2115, 2154, 2155, and 2156 for a printer execute a color conversion process 113 and halftone process 114. A printer 2095 performs a print process 115.
A tile-raster conversion process 111 requires an intermediate memory 112 corresponding to the height of a tile. The image output interfaces 2113, 2151, 2152, and 2153 use a partial area in an image memory 2123 via a memory bus 2108.
FIG. 19 is a schematic view showing an example of processed data obtained by the vector data generation process 101 to the raster-tile conversion process 105 in the process sequence of the prior art shown in FIG. 18. A process to rasterize a flat object 602 and image 603 in a background 601 will be exemplified. A region where neither the red and rectangle object 602 nor image 603 exists is a background, and the background is white in this example.
Vector data represented by the first stage of FIG. 19 is generated by the vector data generation process 101.
The generated vector data is converted into span information represented by the second stage of FIG. 19 by the span information generation process 102. Since scan line A contains only the background, scan line A has span A ranging from the right to left edges of a page. Scan line BCD contains the red and rectangle object 602. For scan line BCD, span B of the background, span C of the red and rectangle object, and span D of the background are generated. Scan line BEF contains the red and rectangle object 602 and image 603. For scan line BEF, span B of the background, span E of the red and rectangle object 602, and span F of the image 603 are generated.
Subsequently, the color filling process 103 is executed as represented by the third stage of FIG. 19. For scan line A, run-length information is generated as a combination of the background color “white” and the span length. For scan line BCD, run-length information is generated as a combination of the color “white” and span length of the background, the color and span length of the red and rectangle object 602, and the color “white” and span length of the background. For scan line BEF, run-length information is generated as a combination of the color “white” and span length of the background, the color and span length of the red and rectangle object 602, the color information arrangement of respective pixels of the image 603.
Then, the pieces of run-length information are converted into pixel information by the pixel generation process 104, as represented by the fourth stage of FIG. 19. The image is converted from the raster sequence of the page into the tile sequence by the raster-tile conversion process 105.
However, in the raster-tile conversion process 105 of the prior art, a large amount of data is read out from and written in the intermediate buffer memory 106 (RAM 2002). To convert an image of the A4 size (21 cm wide and 29.5 cm long) from the raster sequence into the tile sequence, when the print resolution is 600 dpi, the intermediate buffer memory 106 needs to store data having a size of
                    (                                            21              ⁢                                                          [              cm              ]                        /                          2.54              ⁢                                                          [                              cm                /                inch                            ]                                ×                      600            ⁢                                                  [            dpi            ]                          )            ×              (                                            29.5              ⁢                                                          [              cm              ]                        /                          2.54              ⁢                                                          [                              cm                /                inch                            ]                                ×                      600            ⁡                          [              dpi              ]                                      )              =                            4960          ⁢                                          [          pixels          ]                ×                  6968          ⁢                                          [          pixels          ]                    =              34.56        ⁢                                  [        Mpixels        ]                        1      ⁢                          [      pixel      ]        =                            4          ⁢                                          [          bytes          ]                ⁢                                  ⁢                  (                                    R              =                              8                ⁢                                                                  ⁢                bits                                      ,                          G              =                              8                ⁢                                                                  ⁢                bits                                      ,                          B              =                              8                ⁢                                                                  ⁢                bits                                      ,                          Attribute              =                              8                ⁢                                                                  ⁢                bits                                              )                ⁢                  34.56          ⁢                                          [          Mpixels          ]                ×                  4          ⁢                                          [          bytes          ]                    =              138.24        ⁢                                  [        MB        ]            
Implementing a print speed of 85 sheets/min requires a memory data transmission band of(138.24 [MB: for write]+138.24 [MB for read])/(60 [sec]/85 [ppm])=391.68 [MB/s]
Since the print resolution is increasing year by year, a memory data transmission band necessary for a high print resolution of 1,200 dpi becomes four times wider than that for the print resolution of 600 dpi. Thus, the print resolution of 1,200 dpi requires a memory data transmission band of391.68 [MB/s]×4=1566.72 [MB/s]=1.567 [GB/s]
The theoretical memory data transmission band of a DDR2 SDRAM (400 MHz, 64 bits) is 3.2 [GB/s]. However, an effective memory data transmission band in random access falls within a range of 1 [GB/s] to 1.5 [GB/s].
At the print resolution of 600 dpi, a DRAM can be used to execute the raster-tile conversion process 105, and can also be shared with another process because the memory band has a margin. However, if the print resolution increases to 1,200 dpi, it is the limit of one DRAM to execute only the raster-tile conversion process 105. Since the memory band has no margin, another DRAM needs to be installed to perform another process. This increases the cost.
In FIG. 16A, the RAM 2002 used as the intermediate buffer memory 106 is arranged outside the ASICs (the system controller unit 2150 and image processing unit 2149 surrounded by broken lines). As another solution to widen the memory data transmission band, the intermediate buffer memory 106 may also be implemented by an on-chip memory on the ASIC without installing another DRAM. In this case, the memory requires a capacity of
            (                                    29.5            ⁢                                                  [            cm            ]                    /                      2.54            ⁢                                                  [                          cm              /              inch                        ]                          ×                  1200          ⁢                                          [          dpi          ]                    )        ×          32      ⁢                          [              lines        /        title            ]        ×          2      ⁢                          [      bands      ]        ×          4      ⁢                          [      bytes      ]        =                    4960        ⁢                                  [        pixels        ]            ×              6968        ⁢                                  [        pixels        ]              =          3.56      ⁢                          [      MB      ]      
A 3.56-MB on-chip memory can be implemented using a 90-nm semiconductor process. However, this also greatly increases the cost, and the same problem as the above-described one still remains unsolved.